RCPU

My dream CPU

IV. Compressed instructions

Let calc how many bits are needed for one instruction. A instruction contain:

pipeline I,D, A	- 2 bits
Data sign: register - memory, memory-register and register - register	- 2 bits
REgister and calc code (256)	- 8 bits
Three base registers rBs1,2,3	- 2 bits
Three index registers	- 2 bits
Index or absolute addressing	- 1 bit
Compare condition <,<=, ==, =>, > , != 6 conditions	- 3 bits

This are 20 bits for one instruction. This are approximate calculations. We should reserve some bits for future improvements. Could be add some more units and instructions. In 32 bits release the register is fast full, but in 64 bits release we have place for 2 instruction codes in one 64 bits word. In 64 bit release LSB will contain one instruction code MSB another instruction code. Next 2 memory addresses contain instruction operands for this instructions, as shown on picture.

Fig. 8 Compressed instruction.

This is double instruction or compresses instruction.

The benefit from this instruction is, that this instruction is shorter. Usually 2 instructions are in 4 serial addresses. With compressed instruction they are in 3 serial addresses. This is 25% small used memory space. Today computers have gigabytes memory, but the cache memories are still not to big and compressed instructions are helpful. Another benefit is 1 clock less by loading instructions.